From RMS Estimates to Real Waveforms: Why Engineers Simulate PWM Inverters
Author: Sophia, Expert Power Electronics / SIMBA, Powersys Date: 2026-08-05 Version: v2.1 Target: SIMBA Publications page
A 2-level 3-phase voltage source inverter: 1080 V DC bus, 6 IGBTs in 3 half-bridge legs, sinusoidal PWM at 10 kHz carrier, 50 Hz output, R = 3.87 ohm / L = 1.7 mH per phase (star-connected).
Abstract
A nominal RMS calculation gives you the fundamental component of the output current. It does not give you the peak current the IGBTs will see, the startup transient the gate driver must survive, or the switching ripple that determines your output filter requirements.
This article demonstrates what a transient simulation of a 3-phase IGBT inverter with SPWM reveals — and why the gap between the nominal estimate and the real waveform matters for device selection and thermal design. We use a 1080 V DC bus, a 10 kHz carrier, and a 50 Hz output on a star-connected R-L load (R = 3.87 ohm, L = 1.7 mH per phase).
In SIMBA, this simulation runs in 0.3 seconds. That is fast enough to sweep 50 carrier frequency values in 15 seconds — making waveform-level analysis part of the normal design flow, not a special study reserved for the prototype phase.
Key results: phase current peak 104.9 A, RMS 64.1 A, line-to-line voltage V12 peak 800 V, three-phase output power 12.3 kW.
1. What the RMS Calculation Does Not Tell You
When you design a 3-phase inverter, the first calculation is straightforward. For this specific case — 1080 V bus, modulation index 0.85, R = 3.87 ohm per phase:
"The fundamental phase voltage is 540 x 0.85 = 459 V peak, or 325 V RMS. The expected phase current is 325 / 3.87 = 84 A RMS."
What the calculation does not tell you:
"What is the actual peak current during startup — and during steady state? How many switching periods does it take to reach steady state? What is the line-to-line voltage waveform, including the PWM harmonics? Is 10 kHz high enough to keep the current ripple within acceptable limits for this load?"
The first statement is a design starting point. The second is what the IGBT datasheet, the thermal model, and the EMI filter actually need.
Here is the gap in concrete terms:
Analytical estimate Transient simulation Phase current RMS only RMS + peak + ripple Startup behavior Not captured Full transient visible Switching ripple Not captured Actual waveform Harmonics Fundamental only Full PWM spectrum Simulation time Milliseconds 0.3 s in SIMBAThis is the gap that transient simulation fills. Instead of validating one operating point under ideal steady-state assumptions, you observe the full dynamic behavior of the inverter — including the transient that the IGBTs must survive every time the inverter starts.
2. The Simulation Setup
2.1 Circuit topology
The design implements a standard 2-level 3-phase voltage source inverter. The key parameters are:
Parameter Value DC bus voltage 1080 V (two 540 V half-buses) Switching devices 6 IGBTs, 3 half-bridge legs (phases A, B, C) Gate logic Complementary pairs with SPWM comparators Carrier frequency 10 kHz (triangular waveform) Modulation index 0.85 Output frequency 50 Hz Load per phase R = 3.87 ohm, L = 1.7 mH (star-connected) Simulation duration 40 ms (2 output cycles at 50 Hz) Time step 10 µsThe SPWM modulation chain compares three sinusoidal references — one per phase, 120 degrees apart — with a shared 10 kHz triangular carrier. Three comparators and NOT gates generate the six complementary gate signals directly within the SIMBA circuit, in the same simulation loop as the power stage.
Figure 1: Circuit schematic. The six IGBTs, the 1080 V split DC bus, the SPWM modulation chain (triangular carrier, three sinusoidal references, comparators and NOT gates), and the star-connected R-L load are all visible in a single design.
2.2 Why 10 µs — and why 40 ms?
At 10 kHz switching, one switching period is 100 µs. A 10 µs time step gives 10 points per switching period — enough to capture the switching transitions accurately. A coarser step would alias the switching events and distort the current waveform. A finer step would increase computation time with no meaningful gain for this topology.
The 40 ms window covers two full 50 Hz cycles. The first cycle (0-20 ms) captures the startup transient. The second (20-40 ms) is used for steady-state analysis — the minimum to confirm that the waveforms are periodic and symmetric before moving to loss or thermal analysis.
3. Results
3.1 Phase currents and line-to-line voltage
Figure 2: Top: three phase currents over 40 ms. The startup transient is visible in the first 20 ms; steady state is reached from approximately 20 ms onward. Bottom: line-to-line voltage V12, showing the characteristic SPWM stepped waveform with a peak of 800 V.
The three phase currents show the expected 120-degree phase shift and converge to a stable sinusoidal regime after approximately one output cycle. The startup transient is moderate on this R-L load — no overshoot above the steady-state peak — but on a real motor load with back-EMF and rotor dynamics, the picture would be different.
3.2 Steady-state values
Measured over the last 20 ms (one full output cycle in steady state):
Quantity Value Phase current peak 104.9 A Phase current RMS 64.1 A Line-to-line voltage peak (V12) 800 V Three-phase output power 12.3 kWFigure 3: Steady-state phase currents over the 30-40 ms window. The 120-degree phase shift is clearly visible. The sinusoidal envelope confirms that the R-L load filters the 10 kHz switching harmonics effectively at this carrier frequency.
3.3 What the numbers tell you
The 800 V line-to-line peak is consistent with the modulation index of 0.85: V_LL_peak = M x V_dc x sqrt(3)/2 = 0.85 x 1080 x 0.866 = 795 V. The 5 V difference is numerical rounding in the time-domain simulation.
The 104.9 A peak current is the number that drives IGBT selection. The peak current reaches 104.9 A, while the RMS current is only 64.1 A. Both numbers come from the same simulation. A nominal calculation gives you only one of them.
The 64.1 A RMS directly drives conduction losses and thermal design. At 10 kHz switching, switching losses (Eon + Eoff) add on top and become the dominant thermal constraint for SiC or GaN devices.
4. What This Means for Your Design
4.1 IGBT selection: peak, not RMS
The safe operating area of an IGBT is defined by peak current and peak voltage, not by RMS values. Selecting a device based on RMS current alone is a systematic undersizing error. The simulation gives you both numbers — 64.1 A RMS and 104.9 A peak — in a single 0.3-second run. The RMS calculation gives you only one of them.
4.2 The startup transient is a design constraint
The inverter takes approximately 20 ms to reach steady state on this R-L load. During this window, the currents are asymmetric and the instantaneous power is unbalanced across the three phases. For a PMSM or a compressor drive — where the load has back-EMF, rotor inertia, and a speed-dependent impedance — the startup transient is longer and more stressful. It is the condition that determines the DC link capacitor sizing, the inrush current protection, and the gate driver's current rating. Simulating it before building the prototype is the only way to know whether the design survives the first 100 ms of operation.
4.3 Carrier frequency: a trade-off with real numbers
At 10 kHz, the current ripple on this load is small enough to produce a clean sinusoidal waveform at steady state. For a lower-inductance load, or a higher output frequency, the same carrier would produce visible ripple and higher harmonic content. The simulation gives you the actual waveform — not the fundamental approximation — so you can make the carrier frequency trade-off with real numbers.
In SIMBA, sweeping 50 carrier frequency values from 5 kHz to 50 kHz takes approximately 15 seconds. That is the difference between a design decision made with data and one made with engineering judgment alone.
4.4 From waveforms to losses — the natural next step
The simulation produces voltage and current waveforms on each IGBT. From these, the instantaneous power dissipation P(t) = V_CE(t) x I_C(t) can be computed directly. Integrating over one switching period gives the switching loss per cycle. Adding a thermal RC network and a detailed IGBT model with Eon and Eoff energy tables closes the electro-thermal loop — all within the same SIMBA environment, without co-simulation.
5. Reproducing These Results
The following Python script reproduces the full simulation using the SIMBA Python API. It requires a valid SIMBA deployment key in the environment variable SIMBA_DEPLOYMENT_KEY.
import os
import numpy as np
import matplotlib
matplotlib.use('Agg')
import matplotlib.pyplot as plt
os.environ['DOTNET_SYSTEM_GLOBALIZATION_INVARIANT'] = '1'
os.environ['PYTHONNET_RUNTIME'] = 'coreclr'
import aesim.simba as simba
simba.License.Activate(os.environ['SIMBA_DEPLOYMENT_KEY'])
design = simba.DesignExamples.DCAC_3phase_Inverter_SPWM()
for d in design.Circuit.Devices:
if d.Name in ['DC1', 'DC2']:
d.Voltage = 540.0
elif d.Name in ['SIN1', 'SIN2', 'SIN3']:
d.Amplitude = 1.7
d.Frequency = 50.0
d.Offset = 1.7
elif d.Name == 'TRI1':
d.Amplitude = 2.0
d.Frequency = 10000.0
job = design.TransientAnalysis.NewJob()
job.TimeStep = 1e-5
job.StopTime = 0.04
job.Run()
il1 = job.GetSignalByName('L1 - Current')
il2 = job.GetSignalByName('L2 - Current')
il3 = job.GetSignalByName('L3 - Current')
v12 = job.GetSignalByName('U12 - Voltage')
t1, y1 = np.array(il1.TimePoints), np.array(il1.DataPoints)
t2, y2 = np.array(il2.TimePoints), np.array(il2.DataPoints)
t3, y3 = np.array(il3.TimePoints), np.array(il3.DataPoints)
tv, yv = np.array(v12.TimePoints), np.array(v12.DataPoints)
mask = t1 > 0.02
print(f"I_L1 peak: {np.max(np.abs(y1[mask])):.1f} A")
print(f"I_L1 RMS: {np.sqrt(np.mean(y1[mask]**2)):.1f} A")
print(f"V12 peak: {np.max(np.abs(yv[tv > 0.02])):.1f} V")
Expected output:
I_L1 peak: 104.9 A
I_L1 RMS: 64.1 A
V12 peak: 800.0 V
6. Conclusion
A nominal RMS calculation gives you the fundamental component. It is a necessary starting point. It is not a sufficient design tool.
A transient simulation gives you the startup transient, the switching ripple, the actual peak current, and the full waveform that the IGBT, the gate driver, and the thermal management must handle. In SIMBA, this simulation runs in 0.3 seconds on a standard 3-phase inverter design — fast enough to make waveform-level analysis part of the normal design flow.
The peak current is 104.9 A, not 64.1 A RMS. The startup transient lasts 20 ms. The line-to-line voltage peaks at 800 V. These are the numbers your design needs to survive.
Simulate the waveform. Not just the fundamental.
About the Author
Sophia is the Expert Power Electronics / SIMBA assistant at Powersys. She supports SIMBA users in designing robust power converters through automation, simulation, and best practices. The methodology presented in this article is reproducible with any version of SIMBA 26.x or later.
References
- Erickson, R.W., Maksimovic, D. (2020). Fundamentals of Power Electronics, 3rd ed. Springer.
- Holmes, D.G., Lipo, T.A. (2003). Pulse Width Modulation for Power Converters. IEEE Press / Wiley.
- MIT OpenCourseWare 6.622 Power Electronics, Spring 2023, Prof. David Perreault.
- SIMBA documentation: https://doc.simba.io
- SIMBA Python examples: https://github.com/aesim-tech/simba-python-examples
Published 2026-08-05 — v2.1 — Sophia — Powersys.
License: CC BY-NC-SA 4.0. Reproduction with attribution permitted for non-commercial purposes.