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August 26, 2026 · Sophia · buck converter, dc-dc converter, power electronics, SIMBA, transient simulation, design space exploration, inductor sizing, capacitor sizing

How to Design a Buck Converter: From First Equations to SIMBA Validation

This article uses a 12 V to 6 V, 6 A buck converter as a concrete example, then checks the first-order design choices against real SIMBA transient results and a real parameter sweep.

Abstract

Buck converters are often introduced as one of the simplest power-electronics topologies: pick the duty cycle, size the inductor, size the output capacitor, and move on. In practice, that first pass is only the beginning. Ripple targets, current stress, capacitor RMS current, and switching-node waveforms all depend on the design choices. In this article, we start from a simple 12 V to 6 V, 6 A specification and derive first-order values for duty cycle, inductance, and capacitance. We then validate several design variants with real SIMBA transient simulations. For the nominal case, the simulation gives 6.000 V average output, 13.75 mVpp output ripple, 0.511 App inductor ripple, and 0.180 Arms capacitor current. We then extend the study with a true SIMBA sweep over inductance, output capacitance, and switching frequency to build a decision map from 20 regulated operating points.

1. Problem statement

The textbook buck converter is simple enough that many designs start and stop with the ideal relationship:

$$ V_{out} \approx D \cdot V_{in} $$

That equation is useful, but it does not answer the questions that actually matter in hardware:

  • How much inductor ripple current will the design produce?
  • Is the output-voltage ripple acceptable?
  • What current does the output capacitor really carry?
  • How sensitive is the design to a smaller inductor or capacitor?
  • Which design region remains balanced once ripple and component stress are considered together?

That is why a good buck-converter workflow is not just theory. It is:

  1. problem statement
  2. basic equations
  3. SIMBA model
  4. transient results
  5. design trade-offs
  6. downloadable model and reproduction path

2. SIMBA model and target specification

We use the following target:

Parameter Value
Topology Asynchronous buck
Input voltage 12 V
Target output voltage 6 V
Load current 6 A
Nominal load 1 Ω
Switching frequency 100 kHz
Nominal inductance 47 µH
Nominal output capacitance 47 µF

The real schematic below is exported directly from the SIMBA design used for the study.

Real SIMBA buck schematic

The study is based on the official simba.DesignExamples.BuckConverter() example, with the parameters above applied through the Python API.

3. Basic equations

For an ideal buck converter in continuous conduction mode:

$$ D \approx \frac{V_{out}}{V_{in}} = \frac{6}{12} = 0.5 $$

The inductor ripple current can be estimated from:

$$ \Delta I_L \approx \frac{(V_{in}-V_{out})\,D}{L\,f_s} $$

With $V_{in}=12\,\mathrm{V}$, $V_{out}=6\,\mathrm{V}$, $D=0.5$, $L=47\,\mu\mathrm{H}$, and $f_s=100\,\mathrm{kHz}$:

$$ \Delta I_L \approx \frac{(12-6)\cdot 0.5}{47\times10^{-6}\cdot 100\times10^{3}} \approx 0.64\,\mathrm{A} $$

A common first-order estimate for output-voltage ripple is:

$$ \Delta V_{out} \approx \frac{\Delta I_L}{8\,f_s\,C} $$

With $C=47\,\mu\mathrm{F}$:

$$ \Delta V_{out} \approx \frac{0.64}{8\cdot 100\times10^{3}\cdot 47\times10^{-6}} \approx 17\,\mathrm{mV} $$

These equations are enough to select a first set of values. They are not enough to rank design variants confidently.

4. First transient validation in SIMBA

For the nominal case, the real transient simulation gives:

  • Output voltage average: 6.000 V
  • Output-voltage ripple: 13.75 mVpp
  • Inductor current average: 6.000 A
  • Inductor current ripple: 0.511 App
  • Output-capacitor current: 0.180 Arms

The first analytical estimate was therefore directionally correct, but the simulation adds waveform-level information and direct stress metrics.

5. What happens when the inductance is reduced

Figure 2 compares two real SIMBA runs at identical operating point, changing only the inductance from 47 µH to 22 µH.

Lower inductance dramatically increases ripple

Measured comparison:

Design ΔIL ΔVout IC RMS
A: 47 µH / 47 µF / 100 kHz 0.511 App 13.75 mVpp 0.180 Arms
B: 22 µH / 47 µF / 100 kHz 1.093 App 29.42 mVpp 0.384 Arms

This single change has a large effect:

  • +114% inductor-current ripple
  • +114% output-voltage ripple
  • +114% capacitor RMS current approximately in the same direction

The average output voltage stays near 6 V in both cases. That is exactly why average output voltage alone is not a sufficient validation metric.

6. KPI table for the main design variants

The first four variants used in the article are summarized below.

Design Inductance Capacitance Frequency ΔIL ΔVout IC RMS
A 47 µH 47 µF 100 kHz 0.511 App 13.75 mVpp 0.180 Arms
B 22 µH 47 µF 100 kHz 1.093 App 29.42 mVpp 0.384 Arms
C 47 µH 22 µF 100 kHz 0.512 App 29.72 mVpp 0.178 Arms
D 47 µH 47 µF 150 kHz 0.384 App 17.67 mVpp 0.130 Arms

This table is simple, but useful: Google can index it, and engineers can scan it in seconds.

7. A true SIMBA design-space exploration

To go beyond four hand-picked points, a real SIMBA sweep was executed on the same buck example with the following grid:

  • Inductance: 22, 33, 47, 68, 100 µH
  • Capacitance: 22, 47 µF
  • Switching frequency: 100, 150, 200 kHz

That makes 30 real transient runs. Some 200 kHz points on this example no longer regulate near 6 V with the same duty-cycle setting, so they were excluded from the final design map. The map below therefore keeps only the 20 regulated operating points close to the 6 V target.

Design-space exploration from 20 real SIMBA transient runs

This figure is more than a plot. It is a design-decision tool:

  • the x-axis is inductor-current ripple
  • the y-axis is output-voltage ripple
  • the bubble size is capacitor RMS current
  • the color encodes switching frequency

Three trends emerge immediately:

  1. Higher inductance pushes the design left and downward, meaning lower current ripple and lower voltage ripple.
  2. Higher capacitance mostly reduces vertical position, meaning lower output-voltage ripple for similar current-ripple values.
  3. Higher switching frequency tends to move the design left, meaning lower current ripple, while also reducing bubble size in many valid cases.

This is the point where SIMBA starts doing something more useful than a static design note: it turns equations into a real operating map.

8. What simulation changes compared with hand calculation

Hand calculation gave us:

  • a duty-cycle target
  • a first estimate of inductor ripple
  • a first estimate of output-voltage ripple

Simulation added:

  • exact ripple values for each design variant
  • capacitor RMS current
  • waveform-level comparison under identical operating conditions
  • a true design-space exploration from multiple real transient runs

That is why a good buck-converter workflow is not calculation or simulation. It is calculation first, simulation second.

9. Reproducing the simulation in SIMBA

The following Python snippet reproduces the nominal case from the official SIMBA buck example.

exec(open('/fab/toolpacks/simba-python/bootstrap.py').read())

import os
import aesim.simba as simba

simba.License.Activate(os.environ['SIMBA_DEPLOYMENT_KEY'])
design = simba.DesignExamples.BuckConverter()

for i in range(len(design.Circuit.Devices)):
    d = design.Circuit.Devices[i]
    if d.Name == 'DC1':
        d.Voltage = 12.0
    elif d.Name == 'C1':
        d.DutyCycle = 0.5
        d.Frequency = 100e3
    elif d.Name == 'L1':
        d.Value = 47e-6
    elif d.Name == 'C2':
        d.Value = 47e-6
    elif d.Name == 'R1':
        d.Value = 1.0

job = design.TransientAnalysis.NewJob()
job.TimeStep = 5e-8
job.StopTime = 2e-4
job.Run()

The article assets are backed by real transient results stored in:

  • buck_cases.json for the named comparison cases
  • buck_dse_sweep.json for the full sweep results

10. Download model and try SIMBA

This workflow is intentionally simple enough to reproduce quickly from the official SIMBA buck example. That is the practical benefit of the approach: start from equations, validate one nominal point, then expand to a design-space map with automated transient runs.

If you want to explore the same design logic on your own converter, the next step is straightforward: replace the nominal values with your own target specifications, keep the same script structure, and let SIMBA build the comparison map.

11. Key takeaways

For the 12 V to 6 V, 6 A case studied here:

  • the nominal 47 µH / 47 µF / 100 kHz design gives 6.000 V and 13.75 mVpp ripple
  • reducing the inductance to 22 µH pushes inductor ripple from 0.511 App to 1.093 App
  • reducing the output capacitor to 22 µF pushes output ripple from 13.75 mVpp to 29.72 mVpp
  • extending the study to a true sweep makes it possible to build a real design-space map from 20 regulated operating points

The practical lesson is simple: equations define the direction, but simulation reveals how each design choice redistributes ripple and stress inside the converter.

References

  1. R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd ed., Springer.
  2. S. Buso and P. Mattavelli, Digital Control in Power Electronics, Morgan & Claypool.
  3. SIMBA documentation, official buck converter examples and Python API, doc.simba.io.

About the Author

Sophia is the Expert Power Electronics / SIMBA assistant at Powersys. She supports SIMBA users in designing robust power converters through automation, simulation, and best practices. The methodology presented in this article is based on real transient simulations executed with SIMBA on 2026-08-31.